Việc làm nổi bật
STANDARD CELL DESIGN ENGINEER
SCHEMATIC DESIGN ENGINEER
MANUFACTURING SUPERVISOR
- This role requires regular onsite presence when managing employees whose responsibilities necessitate onsite work. - Managers of onsite essential roles are expected to be onsite...
NHÂN VIÊN VẬN HÀNH MÁY
- Thực hiện theo quy trình vận hành tiêu chuẩn về an toàn, chất lượng, và 5S. - Thu thập và đánh giá dữ liệu vận hành để tiến hành điều chỉnh thiết bị trực tuyến và đảm bảo tối ưu...
PRODUCT QUALITY ENGINEER
- Responsible in supporting customer reported Intel product quality and technical issues. - May require interacting with customer directly in certain circumstances. - Performing...
HARDWARE ENGINEER
- Detailed analog and digital design including schematic and PCB layout - Responsible for the PCB Design layout for new or existing products. - Collaborating with software engine...
LAYOUT DESIGN ENGINEER
- Perform cell and chip-level schematic entry, IC layout, and verification (LVS, DRC, ERC). - Chip floorplanning and I/O ESD routing, and support/assist in tapeout and documentati...
SR CAD ENGINEER
Job Description Create and modify PCB Designs and detailed CAD drawings with keen attention to DFM/DFA/DFT requirements. Contribute as an individual as well as collaborate closely...
CAD ENGINEER
- Lead in mechanical fabrication drawings and interact with vendors - Advanced electro-mechanical product assembly drawings - Aide in ECOs (Engineering Change Orders) to release ...
SENIOR/STAFF CIRCUIT DESIGN ENGINEER
What You'll Be Doing - Design and develop CMOS special memory circuits including TCAM, BCAM, and multi-port SRAM for advanced process nodes - Own architecture definition and ci...
R&D ENGINEERING, SENIOR STAFF ENGINEER
What You’ll Be Doing: - Designing and verifying embedded memory compilers for advanced nodes. - Collaborating with layout, methodology, and testchip teams to solve technical is...
LAYOUT DESIGNER, STAFF DESIGNER
What You'll Be Doing - Design and develop custom layouts for Embedded Memory IPs, Standard Cells, and IO structures using proficiency with Cadence Virtuoso Layout Suite, Synopsy...
ASIC/SOC DESIGN VERIFICATION SENIOR/STAFF ENGINEER
What You'll Be Doing - Execute the full RTL functional verification lifecycle for IP, subsystem, and SoC projects, from verification planning through coverage closure and signof...
WE ARE HIRING METROLOGY ENGINEER
- Develop measurement recipes and maintainable CD-SEM, AFM, OCD (scatterometry), ellipsometry, or other optical tools. - Perform overlay measurements, monitor CD uniformity, and l...
WE ARE HIRING FACILITY ENGINEER
- Manage the design, construction, and expansion of the factory, ensuring quality, progress, and adherence to technical standards. - Inspect electrical, compressed air, HVAC insta...
EQUIPMENT ENGINEER
- Monitor and improve tool performance, availability, and reliability through FDC, equipment KPI (OEE, EA, MTBF, MTTR); support APC data integrity. - Analyze alarms and system dat...
WE ARE HIRING | PROCESS ENGINEER
- Monitor, set up, and optimize process parameters; establish SPC control limits and respond to out-of-control conditions. - Design, execute DOE for module/recipe optimization; re...
SENIOR STAFF EGINEER DIGITAL VERIFICATION
In your new role you will: - Be responsible for developing SystemVerilog – UVM testbench and solve potentially complex problems related to test bench development - Debug failin...
STAFF/ SENIOR STAFF PHYSICAL DESIGN ENGINEER
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformati...
DESIGN VERIFICATION (SENIOR STAFF ENGINEER)
1. About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carri...
RTL DESIGN LEADER
- Micro-architect and implement RTL for CPU subsystems, bus fabric, peripheral IPs, and AI/NPU blocks in SystemVerilog. - Lead 9-person team: assign block ownership, enforce codi...
DESIGN VERIFICATION LEADER
- Define SoC-level VPlan: block/top UVM environments, functional coverage model, code coverage targets, and formal property coverage. - Lead and mentor 14 DV engineers; allocate ...
PHYSICAL DESIGN LEADER
- Own the full physical implementation flow: floorplanning, power planning, placement, CTS, routing, IR/EM analysis, and GDSII handoff. - Lead and mentor 9 PD engineers; allocate...