SOC TEAM | PHYSICAL DESIGN LEAD

• Own the full physical implementation flow: floorplanning, power planning, placement, CTS, routing, IR/EM analysis, and GDSII handoff. 
• Lead and mentor 9 PD engineers; allocate block ownership and track milestones to tape-out. 
• Drive STA closure across all PVT corners (PrimeTime); coordinate SDC and timing budgets with RTL. 
• Manage power integrity sign-off: static/dynamic IR drop (Redhawk/Voltus), EM analysis, decoupling strategy. 
• Collaborate with Tape-out/Foundry on DRC, LVS, and antenna compliance; interface with foundry PDK. 
• Coordinate with RTL for scan chain reordering and ECO implementation during closure. 
• Document PD methodologies, floorplan decisions, and sign-off criteria. 

• Bachelor’s or Master’s in Electrical/Computer/Microelectronics Engineering. 
• 10+ years physical design; 3+ years as team lead or PD manager. 
• Expert with PnR tools: Cadence Innovus, Synopsys ICC2/Fusion Compiler. 
• Deep knowledge of STA (PrimeTime) and power analysis (Redhawk, Voltus) under MCMM. 
• Strong understanding of advanced-node design rules (16nm/12nm/7nm FinFET), DRC/LVS/ERC. 
• Experience with low-power design: clock gating, power gating, voltage islands, retention cells. 
• Good English and Vietnamese communication skills. 

Nice to Have 

• 3D-IC, chiplet integration, or advanced packaging co-design. 
• Formal equivalence checking (Cadence Conformal LEC). 
• Direct tapeout at TSMC, Samsung, or GlobalFoundries advanced nodes. 

Successful candidates will be part of a friendly, motivated and committed talent teams with various benefits and attractive offers:

• Competitive compensation package, aligned with capabilities and performance.
• 100% salary during the probation period.
• Comprehensive benefits and welfare package (FPT Care, annual company trips, team building activities, annual health check-ups) in line with a large-scale corporation.
• Opportunities to expand your professional network with leading semiconductor partners.
• Exposure to a diverse ecosystem across the semiconductor value chain, including PMIC, IP Solutions, Engineering Services, ATE & Packaging, Camera & Drone, and IoT Devices.
• Access to professional training and development programs within FPT Corporation.
• Working hours: 9:00 AM – 6:00 PM, Monday to Friday.