Mid-Level / Senior Design-for-Test (DFT) Engineer
The DFT Engineer is responsible for carrying out the Design-for-Test (DFT) process, from scan stitching verification to ATPG execution and test pattern generation, following established methodologies and industry best practices.
Main Responsibilities
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Validate scan stitching results and ensure the connectivity and integrity of scan chains.
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Run ATPG processes and generate production-ready test patterns.
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Review test coverage reports and implement measures to achieve coverage targets.
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Troubleshoot DFT-related issues, including constraint violations and unknown-value (X) sources.
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Prepare, maintain, and manage DFT deliverables, technical documentation, and reports.
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Bachelor's degree in Electrical Engineering, Computer Engineering, or a related discipline.
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At least 3 years of professional experience in Design-for-Test (DFT).
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Hands-on experience with scan stitching, ATPG execution, and test coverage analysis.
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Knowledge of stuck-at and transition fault models.
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Experience working with industry-standard DFT and ATPG tools.
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Ability to troubleshoot DFT-related problems and contribute to test coverage closure.
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Guaranteed, highly competitive salary with no negotiation required, offering top-tier compensation in Ho Chi Minh City.
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Attractive salary package plus a 13th-month salary bonus.
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Fixed retention bonus equivalent to two months of salary.
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Complimentary lunch, private health insurance, and a hybrid working arrangement.
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A supportive workplace that promotes well-being and personal development through fun English classes, social beer parties, football and badminton clubs, and other activities.
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Join a state-of-the-art R&D center specializing in automotive SoC development.