Senior Static Timing Analysis (STA) / Physical Implementation Engineer

Pre-Layout Support & Constraint Development

• Support the development and maintenance of SDC constraints under the guidance of senior engineers.

• Assist with physical-aware synthesis using Design Compiler and Fusion Compiler.

• Help prepare netlists for scan stitching and develop timing constraints for test modes.

• Support UPF-based low-power intent modeling, including the implementation of isolation cells and level shifters.

• Generate preliminary pre-layout timing reports and review the results with senior team members.

Post-Layout STA & Timing Analysis

• Perform post-layout static timing analysis (STA) using PrimeTime for assigned design blocks or operating modes.

• Identify setup and hold timing violations and assist with debugging and root-cause analysis.

• Support the implementation and validation of timing engineering change orders (ECOs).

• Assist in correlating timing results between pre-layout and post-layout stages.

• Develop knowledge of MCMM analysis, derating techniques, and timing analysis that accounts for physical effects.

Learning & Engineering Development

• Collaborate with senior engineers to gain practical knowledge of Bos Semiconductors' STA and physical implementation methodologies.

• Participate in timing review meetings and sign-off discussions.

• Adhere to established design flows, scripts, and quality assurance checklists.

• Continuously strengthen knowledge of STA fundamentals, Synopsys tools, and low-power design techniques.

• Bachelor's degree in Electrical Engineering or a related discipline.

• At least 3 years of relevant experience, including internships and academic projects.

• Fundamental knowledge of digital design principles and static timing analysis (STA).

• Familiarity with Linux-based environments and electronic design automation (EDA) workflows.

• Preferred qualifications:

  • Some experience with Synopsys PrimeTime, Design Compiler, or Fusion Compiler.

  • Basic understanding of SDC constraints and UPF-based power intent.

  • A proactive learning attitude and strong motivation to develop a career in physical implementation engineering.

• Guaranteed, highly competitive salary with no negotiation required, offering top-tier compensation in Ho Chi Minh City.

• Attractive salary package plus a 13th-month salary bonus.

• Fixed retention bonus equivalent to two months of salary.

• Complimentary lunch, private health insurance, and a hybrid working arrangement.

• A supportive workplace that promotes well-being and personal development through fun English classes, social beer parties, football and badminton clubs, and other activities.

• Join a state-of-the-art R&D center specializing in automotive SoC development.